Electromigration is the migration of metal atoms in a conductor due to an electrical current. The migration of the metal atoms means metal atoms move from a first area to a second area. As a result, the migrating metal atoms leave voids in the first area. Over time, the voids can grow in size which increases the resistance of the interconnect; or the voids can form opens in the interconnects. Either way, the interconnect fails. The time it takes to form voids which cause failure in the interconnect is called the electromigration lifetime. In copper interconnects used in microelectronics, the electromigration lifetime is determined by mass transport at the interface between the copper and a dielectric capping layer. Accordingly, many schemes to improve electromigration resistance aim to improve the adhesion between the dielectric cap and the copper.
One scheme uses a self-aligned CuSiN cap on the top surface of the interconnect; another uses a self-aligned metal cap of CoWP, and others use an alloy seed layer. In the alloy scheme, a dopant (impurity) is introduced in a copper (Cu) seed layer. During subsequent processing the impurity segregates to the dielectric cap/Cu interface to form an impurity-oxide layer. The greater the amount of impurity, the greater the electromigration resistance (i.e. longer electromigration lifetime). However, the impurities increase the resistance of the interconnects. Furthermore, the segregation of impurity to the interface is believed to be limited by the impurity oxide formation. Thus, once all the impurity-oxide is formed, there is no more driving force for impurity segregation and the impurity remains in the bulk copper thereby increasing the interconnect resistance. In addition, as interconnect line widths shrink, a greater amount of impurity is required to increase electromigration lifetime, thus, further exacerbating the resistance increase problem.
Thus, a method and structure for improved electromigration resistance is needed which improves electromigration lifetime without overly increasing the resistance of the copper interconnect. In addition, the method and structure should be scalable to accommodate decreasing interconnect line widths.